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Outside its regular schedule, this course will be offered in winter term 2025/26 as an exception.

Registration for this course in the winter term 2026 can be made until 05.10.2025 via e-mail to david.mariadasatu-dortmundde. Your course of study and matriculation number are required for successful registration.
The first meeting will take place weekly during the lecture period starting from 14.10.25 from 1:30 pm to 4:30 pm. Weekly presence during this time is mandatory and no remote work allowed. You can only successfully participate when attending all sessions. 
The lab will take place in room P1-01-106.
 

Organizational

This practical course is aimed at students on the Master's degree course in Electrical Engineering and Information Technology and provides an overview of FPGA programming using VHDL and Vivado.
Basic knowledge of software programming and computer architectures is expected.
The course is carried out during the semester. Attendance at all practice sessions is mandatory.
 

Course Content

By attending this course, students will learn how to work with current FPGA Architectures and Boards. The
fundamentals in the usage of tools and programming VHDL will be shown.
In multiple practical lessons, VHDL and Xilinx Vivado will be used to implement hardware designs for
different tasks. The students will implement practical exercises on a FPGA Development Board.